The present disclosure relates to processor management, and more particularly, dynamic management of a processor state with transient cache memory.
Although the speed of processor cores has increased (somewhat paralleling the increased chip density predicted by Moore's law), the speed with which processor memory can be accessed has not increased proportionally. To mitigate the slower access speeds to memory, modern processors have included multiple levels of high-speed caches that can provide data access to a smaller subset of the memory at speeds that are closer to that of the core processor. In some implementations, each level of cache represents a minority subset of the higher-level cache memory that is closer to the real memory. Thus having trivial or useless data brought into one or more cache levels can remove more useful data. Such cache “pollution” may “pollute” the cache and can slow the overall processing speed.
To ameliorate older programming technologies, modern programming languages have hidden many of the details of memory management. Although this has resulted in fewer instances of so-called memory leaks and erroneous or malicious memory accesses, and it may have increased programmer productivity, it has placed an additional burden on the compiler or interpreter that implements the language—that of cleaning up after the wayward program. This garbage collection process is periodically utilized in conventional computing systems to free up stale blocks of memory that are no longer accessed by an application program, and potentially defragment the freed blocks into larger contiguous blocks.
Because much of the memory being manipulated during a garbage-collection process represents locations that are no longer in use by a program, and because a large volume of memory locations may be accessed, bringing these locations into CPU caches may pollute the cache with useless data. This may result in the purging of data that could be more useful to keep in the cache, but is being purged simply because it is not accessed during the surge of other garbage-collection accesses. For example, least-recently-used (LRU) algorithms may be used to purge data that is meaningful, even though it does not appear to have been accessed recently due to the glut of garbage-collection references. Current memory management schemes may not determine a “transiency” status of memory locations, which determines when non-transient accesses are to be performed, nor do they capitalize on the transient nature of some memory locations.